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* Upgrade Rockchip platforms to Linux 6.12 Upgrade all Rockchip boards to latest 6.12. Patches for M1S can be dropped, its DTS has been merged. Same goes for the Rockchip TRNG, it only had to be enabled in the Green DTS. Patch for broken combphy has been updated for 6.12.y. * Remove deprecated and nonsense symbols from Rockchip defconfig Many symbols have been removed between 6.6 and 6.12. Most of them have no use in Rockchip defconfig, or should be set by other kernel fragments anyway. Remove all of them, with the exception of USB_ONBOARD_HUB (which was renamed to USB_ONBOARD_DEV) and FSCACHE (which was changed from tristate to bool). * Update generic-aarch64 to Linux 6.12 * Update Amlogic-based ODROID boards to Linux 6.12 Removed couple of deprecated/unrelated kernel options. * Update VIM3 to Linux 6.12 Cleaned up symbols unrelated/deprecated in 6.12 from defconfig. * Update ODROID-XU4 to Linux 6.12 The usual defconfigs suspects had to been removed and the regulator patch for ethernet needed a minor update after refactoring in upstream. * Update Tinker to Linux 6.12 Needed defconfig cleanup for 6.12, otherwise no changes. * Update x86 and OVA to latest 6.12 release This way the extra patches directory can be removed too. * Remove 6.6.73 patches * Refresh all linux patch series against 6.12.11 sources * Reenable HW RNG on M1S to speed up boot The TRNG on RK3566 supposedly [1] has low quality, that's why it's disabled in upstream for this SoC. We had it enabled in the past and without it, the boot is delayed by quite a lot. Enable it again for now and investigate the RNG issues later. [1] https://patchew.org/linux/cover.1722355365.git.daniel@makrotopia.org/ * Also remove CACHEFILES module from Rockchip config It was only enabled for Rockchip and Tinker, and to my knowledge there is no cachefiles daemon or anything other in the userspace that's using it. * Remove unused 6.6.y fragments Since we only have 6.6.y for Raspberry Pi now, it doesn't need the Rockchip and wireless PCI fragments.
50 lines
1.4 KiB
Diff
50 lines
1.4 KiB
Diff
From 37b4467356113f17f55066aef54db55b64daa030 Mon Sep 17 00:00:00 2001
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From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
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Date: Mon, 5 Nov 2018 22:15:14 +0100
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Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
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Taken from, and tested by @TonyMac32 .
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Well, the original one was tested by him but I had to adapt the
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registers definitions to the new 64-bits LPAE-compliant syntax.
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Therefore that *might* break, along with a few other patches.
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Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
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[move change to rk3288-tinker.dtsi]
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 19 +++++++++++++++++++
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1 file changed, 19 insertions(+)
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diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
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index 09618bb7d872c..30430d2e64b93 100644
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--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
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+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
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@@ -483,6 +483,25 @@ &sdio0 {
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status = "okay";
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};
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+&spi2 {
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+ max-freq = <50000000>;
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+ status = "okay";
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+
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+ spidev@0 {
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+ compatible = "rockchip,spi_tinker";
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+ reg = <0x0 0>;
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+ spi-max-frequency = <50000000>;
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+ spi-cpha = <1>;
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+ };
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+
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+ spidev@1 {
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+ compatible = "rockchip,spi_tinker";
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+ reg = <0x1>;
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+ spi-max-frequency = <50000000>;
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+ spi-cpha = <1>;
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+ };
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+};
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+
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&tsadc {
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rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
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rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
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