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dc7b693691
* Refresh fileenv patch for U-Boot 2025.01 * Update Tinker to U-Boot 2025.01 Needs minor patch adjustment, also fixed patch numbering. * Update ODROID-N2 to U-Boot 2025.01, move eMMC patch Move the patch for eMMC so it's applied only for N2 specifically and update it for 2025.01. * Update ODROID-C/XU to U-Boot 2025.01 No changes in patches necessary after moving the N2 patch. * Update RPi boards to U-Boot 2025.01 Changes needed in bcmstb PCIe driver due to upstream refactoring, rest only refreshed. All patches now target the same version, so we can drop one of the series. * Update VIM3 to U-Boot 2025.01 No patches here, just version bump. * Update Green to U-Boot 2025.01 Updated and refreshed patches, added a patch to disable OF_UPSTREAM which is now needed. * Update ODROID-M1 to U-Boot 2025.01 Drop patch that has been mostly merged upstream. The change is that HS400 would stay enabled but let's get back to what upstream does. * Update ODROID-M1 to U-Boot 2025.01 Drop all patches as M1S support should be now merged to U-Boot and DTS taken from upstream. * Disable DFU and mkeficapsule to fix build mkeficapsule requires gnutls to be built first but it's not among dependencies. Since we don't need the tool, we can disable it. DFU is also not used on HAOS and it implies EFI_LOADER that we already disable. Moreover, that also sets SET_DFU_ALT_INFO and leads to linker failure on some platforms where it's not implemented. * fixup! Update Green to U-Boot 2025.01 There were more changes needed in the Green config to use correct memory layout due to upstream changes, otherwise we'll have malloc failures in U-Boot proper. * Move N2 eMMC patch to more generic patches-meson To stay on the safe side, move the eMMC hack to more generic folder that's used for all targets using the meson_gx eMMC driver (i.e. C2, C4 and N2). This is still better than keeping it in hardkernel/patches which is applied only to some hardkernel boards (like it was before bump to U-Boot 20205.01).
159 lines
4.8 KiB
Diff
159 lines
4.8 KiB
Diff
From d7f2d45fa63507cef65e86aeb79e1f47733e981c Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Jan=20=C4=8Cerm=C3=A1k?= <sairon@sairon.cz>
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Date: Mon, 30 Sep 2024 18:09:29 +0200
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Subject: [PATCH] reset: reset-brcmstb-rescal: Add Broadcom RESCAL reset
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controller driver
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add driver for brcm,bcm7216-pcie-sata-rescal compatible, based on
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upstream Linux driver. Unlike most of other reset controllers, RESCAL
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takes no reset IDs, so a custom of_xlate function is used that makes the
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driver slightly different from the original implementation.
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Signed-off-by: Jan Čermák <sairon@sairon.cz>
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---
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drivers/reset/Kconfig | 6 ++
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drivers/reset/Makefile | 1 +
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drivers/reset/reset-brcmstb-rescal.c | 101 +++++++++++++++++++++++++++
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3 files changed, 108 insertions(+)
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create mode 100644 drivers/reset/reset-brcmstb-rescal.c
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diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
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index 186dd963bc4..85776ba234d 100644
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--- a/drivers/reset/Kconfig
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+++ b/drivers/reset/Kconfig
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@@ -69,6 +69,12 @@ config RESET_BRCMSTB
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This enables the reset controller driver for Broadcom STB SoCs using
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a SUN_TOP_CTRL_SW_INIT style controller.
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+config RESET_BRCMSTB_RESCAL
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+ bool "Broadcom STB RESCAL reset controller"
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+ help
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+ This enables the RESCAL reset controller found on BCM2712 and some other
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+ Broadcom STB SoCs (BCM7216).
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+
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config RESET_UNIPHIER
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bool "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER
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diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
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index 8d9181e8af7..8f926c52c42 100644
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--- a/drivers/reset/Makefile
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+++ b/drivers/reset/Makefile
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@@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
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obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
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obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
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+obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o
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obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o
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diff --git a/drivers/reset/reset-brcmstb-rescal.c b/drivers/reset/reset-brcmstb-rescal.c
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new file mode 100644
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index 00000000000..37096bb9fff
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--- /dev/null
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+++ b/drivers/reset/reset-brcmstb-rescal.c
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@@ -0,0 +1,101 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Broadcom RESCAL reset controller, based on upstream Linux driver:
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+ * drivers/reset/reset-brcmstb-rescal.c
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+ *
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+ * Copyright (C) 2018-2020 Broadcom
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+ */
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+
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+#include <dm.h>
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+#include <errno.h>
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+#include <malloc.h>
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+#include <reset-uclass.h>
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+#include <asm/io.h>
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+#include <linux/bitops.h>
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+#include <linux/delay.h>
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+#include <linux/iopoll.h>
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+
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+#define BRCM_RESCAL_START 0x0
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+#define BRCM_RESCAL_START_BIT BIT(0)
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+#define BRCM_RESCAL_CTRL 0x4
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+#define BRCM_RESCAL_STATUS 0x8
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+#define BRCM_RESCAL_STATUS_BIT BIT(0)
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+
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+struct brcm_rescal_reset_priv {
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+ void __iomem *base;
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+};
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+
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+static int brcm_rescal_reset_assert(struct reset_ctl *rst)
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+{
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+ return 0;
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+}
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+
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+static int brcm_rescal_reset_deassert(struct reset_ctl *rst)
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+{
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+ struct brcm_rescal_reset_priv *priv = dev_get_priv(rst->dev);
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+ u32 reg;
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+ int ret;
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+
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+ reg = readl(priv->base + BRCM_RESCAL_START);
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+ writel(reg | BRCM_RESCAL_START_BIT, priv->base + BRCM_RESCAL_START);
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+ reg = readl(priv->base + BRCM_RESCAL_START);
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+ if (!(reg & BRCM_RESCAL_START_BIT)) {
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+ printf("failed to start SATA/PCIe rescal\n");
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+ return -EIO;
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+ }
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+
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+ ret = read_poll_timeout(readl, reg, (reg & BRCM_RESCAL_STATUS_BIT),
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+ 100, 1000, priv->base + BRCM_RESCAL_STATUS);
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+ if (ret) {
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+ printf("time out on SATA/PCIe rescal\n");
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+ return ret;
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+ }
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+
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+ reg = readl(priv->base + BRCM_RESCAL_START);
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+ writel(reg & ~BRCM_RESCAL_START_BIT, priv->base + BRCM_RESCAL_START);
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+
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+ return ret;
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+}
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+
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+static int brcm_rescal_reset_of_xlate(struct reset_ctl *reset_ctl,
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+ struct ofnode_phandle_args *args)
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+{
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+ /* Rescal takes no parameters. */
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+ if (args->args_count != 0) {
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+ printf("Invalid args_count: %d\n", args->args_count);
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+ return -EINVAL;
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+ }
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+
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+ return 0;
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+}
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+
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+struct reset_ops brcm_rescal_reset_reset_ops = {
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+ .rst_assert = brcm_rescal_reset_assert,
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+ .rst_deassert = brcm_rescal_reset_deassert,
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+ .of_xlate = brcm_rescal_reset_of_xlate,
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+};
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+
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+static const struct udevice_id brcm_rescal_reset_ids[] = {
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+ { .compatible = "brcm,bcm7216-pcie-sata-rescal" },
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+ { /* sentinel */ }
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+};
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+
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+static int brcm_rescal_reset_probe(struct udevice *dev)
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+{
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+ struct brcm_rescal_reset_priv *priv = dev_get_priv(dev);
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+
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+ priv->base = dev_remap_addr(dev);
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+ if (!priv->base)
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+ return -EINVAL;
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+
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+ return 0;
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+}
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+
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+U_BOOT_DRIVER(brcmstb_rescal_reset) = {
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+ .name = "brcm-rescal-reset",
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+ .id = UCLASS_RESET,
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+ .of_match = brcm_rescal_reset_ids,
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+ .ops = &brcm_rescal_reset_reset_ops,
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+ .probe = brcm_rescal_reset_probe,
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+ .priv_auto = sizeof(struct brcm_rescal_reset_priv),
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+};
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